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| A/D, D/C Converters for Image Signal Processing MN6576H Low Power 9-Bit CMOS A/D Converter for Image Processing Overview The MN6576H is a high-speed 9-bit CMOS analog-todigital converter for image processing applications. It uses a half flash structure based on chopper comparators and achieves both high speed and low power consumption with multiplexing. It provides separate power supply pins for the circuits driving the low-voltage digital output pins. Pin Assignment DVDDL DVSS D6 D5 D4 D3 D2 18 24 23 22 21 20 19 D7 D8 25 26 27 28 29 30 31 1 2 3 4 5 6 7 17 D1 16 15 14 13 12 11 10 8 D0 TEST AVDD AVDD AVSS VRBS VRB AVSS Features Maximum conversion rate: 16 MSPS (min.) Linearity error: 2.5 LSB (typ.) Differential linearity error: 0.6 LSB (typ.) Power supply voltage: 5.0 V or 3.3 V Power consumption: 120 mW (typ.) (fCLK=16 MHz) OVF DVSS DVDD CLK NOE POWD 32 9 AVDD AVDD VRTS AVSS AVSS VRT Applications Digital television receivers Digital video equipment Digital image processing equipment (TOP VIEW) QFH032-P-0707 VRM VIN 1 2 MN6576H Block Diagram TEST D0(LSB) D1 D2 D3 19 18 17 16 14 15 AVDD 13 AV DD 12 AV SS 11 VRBS 10 VRB 9 AV SS 8 VIN 7 AV DD 6 VRM 5 AVDD 4 AV SS 31 31 31 31 Upper comparator (5 bits) Upper encoder (5 bits) Clock generator 5 3V RT 2 VRTS 1 AVSS DVSS 20 21 DVDDL 22 D4 23 D5 24 D6 25 D7 26 D8 27 OVF 28 DVSS 29 DVDD 30 CLK 31 NOE 32 POWD Lower comparator A (4 bits) Lower comparator B (4 bits) 31 31 Lower encoder A (4 bits) 5 A/D, D/C Converters for Image Signal Processing Error correction and data latch Lower encoder B (4 bits) 5 A/D, D/C Converters for Image Signal Processing Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Symbol AVSS VRTS VRT AVSS AVDD VRM AVDD VIN AVSS VRB VRBS AVSS AVDD AVDD TEST D0 D1 D2 D3 DVSS DVDDL D4 D5 D6 D7 D8 OVF DVSS DVDD CLK NOE POWD Function Description Ground for analog circuits Reference voltage power supply (TOP) Reference voltage input (TOP) Ground for analog circuits Power supply for analog circuits Intermediate reference voltage Power supply for analog circuits Analog signal input Ground for analog circuits Reference voltage power supply (BOTTOM) Reference voltage input (BOTTOM) Ground for analog circuits Power supply for analog circuits Power supply for analog circuits Test mode selection Digital code output (LSB) Digital code output Digital code output Digital code output Ground for digital circuits Power supply for low-voltage digital outputs Digital code output Digital code output Digital code output Digital code output Digital code output (MSB) Overflow output Ground for digital circuits Power supply for digital circuits Sampling clock Output enable Power down mode selection MN6576H 3 MN6576H Absolute Maximum Ratings Parameter Power supply voltage A/D, D/C Converters for Image Signal Processing Ta=25C Symbol VDD DVDDL VI VO Topr Tstg Rating - 0.3 to +7.0 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 -20 to +70 -55 to +125 Unit V V V V C C Power supply voltage for digital output circuits Input voltage Output voltage Operating ambient temperature Storage temperature Recommended Operating Conditions Parameter Power supply voltage Power supply voltage for digital output circuits Digital input voltage "H" level "L" level "L" level Clock "H" level pulse width "L" level pulse width Analog input voltage VDD=AVDD=DVDD=4.5V, DVDDL=3.0V, VSS=AVSS=DVSS=0V, Ta=25C Symbol VDD DVDDL VIH VIL VRT VRB tWH tWL VAIN min 4.50 3.0 2.4 VSS 3.0 VSS 25 25 VSS typ 5.00 max 5.25 3.6 VDD 0.8 VDD 2.0 Unit V V V V V V ns ns Reference voltage "H" level VDD V Electrical Characteristics Parameter Power consumption VDD=AVDD=DVDD=4.5V, DVDDL=3.0V, AVSS=DVSS=0V, Ta=25C Symbol Conditions PC VDD=5.0V, DVDDL=3.3V, fCLK=16MSPS (not including reference current) min typ 120 max 150 Unit mW Resolution Linearity error Differential linearity error Maximum conversion rate Clock frequency Analog input dynamic range Output current "L" level Output delay time Analog input capacitance "H" level RES EL ED FC(max.) fCLK DR IOH IOL td CI VOH=DVDDL- 0.8V, VDD=5.0V, DVDDL=3.3V VOL=0.4V, VDD=5.0V DVDDL=3.3V VDD=5.0V, DVDDL=3.3V, CL=10pF VDD=5.0V 2 10 fCLK=16MSPS VRT=3.3V VRB=1.3V 16 1 2 9 2.5 0.6 3.5 1.0 bit LSB LSB MSPS 16 VRT -VRB -2 MHz V mA mA 30 26 45 ns pF 4 A/D, D/C Converters for Image Signal Processing Timing Chart MN6576H The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital output 2.5 clock cycles later at the rising edge of the clock signal. tWH Clock tWL Analog input N N+1 N-2 td(30ns) N+2 N-1 N+3 N N+4 N+1 Data output N-3 Note: The circles indicate analog signal sampling points. 5 MN6576H Package Dimensions (Unit:mm) QFH032-P-0707 A/D, D/C Converters for Image Signal Processing 9.20.2 7.00.2 24 25 17 16 (1.225) 32 1 (1.225) 0.65 8 0.30.1 9 7.00.2 9.20.2 1.10.2 0.10.1 2.9 max. 2.50.2 0.15 -0.05 +0.10 0.1 SEATING PLANE 0 to 10 0.50.2 6 |
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